Core-based Xeon

Dual-Core 3000-series "Conroe" Main article: Conroe (microprocessor)

The 3000 series, codenamed Conroe (product code 80557) dual-core Xeon (branded) CPU, released at the end of September 2006, was the first Xeon for single-CPU operation. The same processor is branded as Core 2 Duo or as Pentium Dual-Core and Celeron, with varying features disabled. They use LGA 775 (Socket T), operate on a 1066 MHz front-side bus, support Enhanced Intel Speedstep Technology and Intel Virtualization Technology but do not support Hyper-Threading. Conroe Processors with a number ending in "5" have a 1333 MT/s FSB.

Model Speed (GHz) L2 Cache (MB) FSB (MHz) TDP (W) 3040 1.86 2 1066 65 3050 2.13 2 1066 65 3055* 2.13 4 1066 65 3060 2.4 4 1066 65 3065 2.33 4 1333 65 3070 2.66 4 1066 65 3075 2.66 4 1333 65 3080* 2.93 4 1066 65 3085 3.00 4 1333 65 Models marked with a star are not present in Intel's database 3100-series "Wolfdale" Main article: Wolfdale (microprocessor)

The 3100 series, codenamed Wolfdale (product code 80570) dual-core Xeon (branded) CPU, was just a rebranded version of the Intel's mainstream Core 2 Duo E7000/E8000 and Pentium Dual-Core E5000 processors, featuring the same 45 nm process and 6 MB of L2 cache. Unlike most Xeon processors, they only support single-CPU operation. They use LGA 775 (Socket T), operate on a 1333 MHz front-side bus, support Enhanced Intel Speedstep Technology and Intel Virtualization Technology but do not support Hyper-Threading.

Model Speed (GHz) L2 Cache (MB) FSB (MHz) TDP (W) E3110 3.00 6 1333 65 L3110 3.00 6 1333 45 E3120 3.16 6 1333 65 5100-series "Woodcrest" Woodcrest Produced From 2006 to 2009 Max. CPU clock rate 1600 MHz to 3000 MHz FSB speeds 1066 MT/s to 1333 MT/s Min. feature size 65nm Instruction set x86 Microarchitecture Core CPUID code 06Fx Product code 80556 Cores 2 L2 cache 4 MB Application DP Server Package(s) LGA 771 Brand name(s) Xeon 51xx

On 26 June 2006, Intel released the dual-core CPU (Xeon branded 5100 series) codenamed Woodcrest (product code 80556); it was the first Intel Core microarchitecture processor to be launched on the market. It is a server and workstation version of the Intel Core 2 processor. Intel claims that it provides an 80% boost in performance, while reducing power consumption by 20% relative to the Pentium D.

Most models have a 1333 MT/s FSB, except for the 5110 and 5120, which have a 1066 MT/s FSB. The fastest processor (5160) operates at 3.0 GHz. All Woodcrests use LGA 771 and all except two models have a TDP of 65 W. The 5160 has a TDP of 80 W and the 5148LV (2.33 GHz) has a TDP of 40 W. The previous generation Xeons had a TDP of 130 W. All models support Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, with the "Demand Based Switching" power management option only on Dual-Core Xeon 5140 or above. Woodcrest has 4 MB of shared L2 Cache.

Model Speed (GHz) L2 Cache (MB) FSB (MHz) TDP (W) 5110 1.60 4 1066 65 5120 1.83 4 1066 65 5128 1.83 4 1066 40 5130 2.0 4 1333 65 5138 2.13 4 1066 35 5140 2.33 4 1333 65 5148 2.33 4 1333 40 5150 2.66 4 1333 65 5160 3.00 4 1333 80 5200-series "Wolfdale-DP" Wolfdale-DP Produced From 2007 to present Max. CPU clock rate 1866 MHz to 3500 MHz FSB speeds 1066 MT/s to 1600 MT/s Min. feature size 45 nm Instruction set x86 Microarchitecture Penryn CPUID code 1067x Product code 80573 Cores 2 L2 cache 6 MB Application DP Server Package(s) LGA 771 Brand name(s) Xeon 52xx

On 11 November 2007, Intel released the dual-core CPU (Xeon branded 5200 series) codenamed Wolfdale-DP (product code 80573). It is built on a 45 nm process like the desktop Core 2 Duo and Xeon-SP Wolfdale, featuring Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology. It is unclear whether the "Demand Based Switching" power management is available on the L5238. Wolfdale has 6 MB of shared L2 Cache.

Model Speed (GHz) L2 Cache (MB) FSB (MHz) TDP (W) E5205 1.86 6 1066 65 L5238 2.66 6 1333 35 X5260 3.33 6 1333 80 X5270 3.50 6 1333 80 X5272 3.40 6 1600 80 7200-series "Tigerton"

The 7200 series, codenamed Tigerton (product code 80564) is an MP-capable processor, similar to the 7300 series, but, in contrast, only one core is active on each silicon chip, and the other one is turned off (blocked), resulting as a dual-core capable processor.

Model Speed (GHz) L2 Cache (MB) FSB (MHz) TDP (W) E7210 2.40 2 × 4 1066 80 E7220 2.93 2 × 4 1066 81 Quad-Core and Multi-Core Xeon 3200-series "Kentsfield" Main article: Kentsfield (microprocessor)

Intel released relabeled versions of its quad-core (2×2) Core 2 Quad processor as the Xeon 3200-series (product code 80562) on 7 January 2007. The 2 × 2 "quad-core" (dual-die dual-core) comprised two separate dual-core die next to each other in one CPU package. The models are the X3210, X3220 and X3230, running at 2.13 GHz, 2.4 GHz and 2.66 GHz, respectively. Like the 3000-series, these models only support single-CPU operation and operate on a 1066 MHz front-side bus. It is targeted at the "blade" market. The X3220 is also branded and sold as Core2 Quad Q6600, the X3230 as Q6700.

Model Speed (GHz) L2 Cache (MB) FSB (MHz) TDP (W) X3210 2.13 2 × 4 1066 100/105 X3220 2.40 2 × 4 1066 100/105 X3230 2.66 2 × 4 1066 100 3300-series "Yorkfield" Main article: Yorkfield (microprocessor)

Intel released relabeled versions of its quad-core Core 2 Quad Yorkfield Q9400 and Q9x50 processors as the Xeon 3300-series (product code 80569). It comprised two separate dual-core dies next to each other in one CPU package and manufactured in a 45 nm process. The models are the X3320, X3350, X3360, X3370 and X3380, running at 2.50 GHz, 2.66 GHz, 2.83 GHz, 3.0 GHz, and 3.16 GHz, respectively. The L2 cache is a unified 6 MB per die (except for the X3320 with a smaller 3 MB L2 cache per die), and a front-side bus of 1333 MHz. All models feature Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology, as well as "Demand Based Switching".

The Yorkfield-CL (product code 80584) variant of these processors are X3323, X3353 and X3363, a reduced TDP of 80W and are made for single-CPU LGA 771 systems instead of LGA 775, which is used in all other Yorkfield processors. Otherwise they are identical to their Yorkfield counterparts.

5300-series "Clovertown" Clovertown Produced From 2006 to present Max. CPU clock rate 1600 MHz to 3000 MHz FSB speeds 1066 MT/s to 1333  Min. feature size 65 nm Instruction set x86 Microarchitecture Core CPUID code 06Fx Product code 80574 Cores 4 L2 cache 2×4 MB Application DP Server Package(s) LGA 771 Brand name(s) Xeon 53xx

A quad-core (2×2) successor of the Woodcrest for DP segment, consisting of two dual-core Woodcrest chips in one package similarly to the dual-core Pentium D branded CPUs (two single-core chips) or the quad-core Kentsfield. All Clovertowns use the LGA 771 package. The Clovertown has been usually implemented with two Woodcrest dies on a multi-chip module, with 8 MB of L2 cache (4 MB per die). Like Woodcrest, lower models use a 1066 MT/s FSB, and higher models use a 1333 MT/s FSB. Intel released Clovertown, product code 80563, on 14 November 2006 with models E5310, E5320, E5335, E5345, and X5355, ranging from 1.6 GHz to 2.66 GHz. All models support: MMX, SSE, SSE2, SSE3, SSSE3, Intel 64, XD bit (an NX bit implementation), Intel VT. The E and X designations are borrowed from Intel's Core 2 model numbering scheme; an ending of −0 implies a 1066 MT/s FSB, and an ending of −5 implies a 1333 MT/s FSB. All models have a TDP of 80 W with the exception of the X5355, which has a TDP of 120 W. A low-voltage version of Clovertown with a TDP of 50 W has a model numbers L5310, L5320 and L5335 (1.6 GHz, 1.86 GHz and 2.0 GHz respectively). The 3.0 GHz X5365 arrived in July 2007, and became available in the Apple Mac Pro on 4 April 2007. The X5365 performs up to around 38 GFLOPS in the LINPACK benchmark.

Model Speed (GHz) L2 Cache (MB) FSB (MHz) TDP (W) E5310 1.60 2 × 4 1066 80 L5310 1.60 2 × 4 1066 50 E5320 1.86 2 × 4 1066 80 L5320 1.86 2 × 4 1066 50 E5335 2.00 2 × 4 1333 80 L5335 2.00 2 × 4 1333 50 E5345 2.33 2 × 4 1333 80 X5355 2.66 2 × 4 1333 120 X5365 3.00 2 × 4 1333 150 5400-series "Harpertown" Harpertown Produced From 2007 to present Max. CPU clock rate 2000 MHz to 3400 MHz FSB speeds 1066 MT/s to 1600  Min. feature size 45 nm Instruction set x86 Microarchitecture Penryn CPUID code 1067x Product code 80574 Cores 4 L2 cache 2 × 6 MB Application DP Server Package(s) LGA 771 Brand name(s) Xeon 54xx Core 2 Quad QX9775

On 11 November 2007 Intel presented Yorkfield-based Xeons – called Harpertown (product code 80574) – to the public. This family consists of dual die quad-core CPUs manufactured on a 45 nm process and featuring 1066 MHz, 1333 MHz, 1600 MHz front-side buses, with TDP rated from 40 W to 150 W depending on the model. These processors fit in the LGA 771 package. All models feature Intel 64 (Intel's x86-64 implementation), the XD bit, and Virtualization Technology. All except the E5405 and L5408 also feature Demand Based Switching. The supplementary character in front of the model-number represents the thermal rating: an L depicts a TDP of 40 W or 50 W, an E depicts 80 W whereas an X is 120 W TDP or above. The speed of 3.00 GHz comes as four models, two models with 80 W TDP two other models with 120 W TDP with 1333 MHz or 1600 MHz front-side bus respectively. The fastest Harpertown is the X5492 whose TDP of 150 W is higher than those of the Prescott-based Xeon DP but having twice as many cores. (The X5482 is also sold under the name "Core 2 Extreme QX9775" for use in the Intel SkullTrail system.)

Intel 1600 MHz front-side bus Xeon processors will drop into the Intel 5400 (Seaburg) chipset whereas several mainboards featuring the Intel 5000/5200-chipset are enabled to run the processors with a 1333 MHz front-side bus speed. Seaburg features support for dual PCIe 2.0 x16 slots and up to 128 GB of memory.

Model Speed (GHz) L2 Cache (MB) FSB (MHz) TDP (W) E5405 2.00 2 × 6 1333 80 L5408 2.13 2 × 6 1066 40 E5410 2.33 2 × 6 1333 80 L5410 2.33 2 × 6 1333 50 E5420 2.50 2 × 6 1333 80 L5420 2.50 2 × 6 1333 50 E5430 2.66 2 × 6 1333 80 L5430 2.66 2 × 6 1333 50 E5440 2.83 2 × 6 1333 80 X5450 3.00 2 × 6 1333 120 E5450 3.00 2 × 6 1333 80 X5460 3.16 2 × 6 1333 120 X5470 3.33 2 × 6 1333 120 E5462 2.80 2 × 6 1600 80 E5472 3.00 2 × 6 1600 80 X5472 3.00 2 × 6 1600 120 X5482 3.20 2 × 6 1600 150 X5492 3.40 2 × 6 1600 150 7300-series "Tigerton" Tigerton Produced From 2007 to present Max. CPU clock rate 1600 MHz to 2933 MHz FSB speeds 1066 MT/s Min. feature size 65 nm Instruction set x86 Microarchitecture Core CPUID code 06Fx Product code 80564 80565 Cores 4 L2 cache 2×2 or 2×4 MB Application MP Server Package(s) mPGA604 Brand name(s) Xeon 72xx Xeon 73xx

The 7300 series, codenamed Tigerton (product code 80565) is a four-socket (packaged in Socket 604) and more capable quad-core processor, consisting of two dual core Core2 architecture silicon chips on a single ceramic module, similar to Intel's Xeon 5300 series Clovertown processor modules.

The 7300 series uses Intel's Caneland (Clarksboro) platform.

Intel claims the 7300 series Xeons offer more than twice the performance per watt as Intel's previous generation 7100 series. The 7300 series' Caneland chipset provides a point to point interface allowing the full front side bus bandwidth per processor.

The 7xxx series is aimed at the large server market, supporting configurations of up to 32 CPUs per host.

model Speed (GHz) L2 Cache (MB) FSB (MHz) TDP (W) E7310 1.60 2×2 1066 80 E7320 2.13 2×2 1066 80 E7330 2.40 2×3 1066 80 E7340 2.40 2×4 1066 80 L7345 1.86 2×4 1066 50 X7350 2.93 2×4 1066 130 7400-series "Dunnington" Dunnington Produced From 2008 to present Max. CPU clock rate 2133 MHz to 2667 MHz FSB speeds 1066 MT/s Min. feature size 45 nm Instruction set x86 Microarchitecture Penryn CPUID code 106D1 Product code 80582 Cores 6 L2 cache 3×3 MB L3 cache 16 MB Application MP Server Package(s) mPGA604 Brand name(s) Xeon 74xx

Dunnington – the last CPU of the Penryn generation and Intel's first multi-core (above two) die – features a single-die six- (or hexa-) core design with three unified 3 MB L2 caches (resembling three merged 45 nm dual-core Wolfdale dies), and 96 kB L1 cache (Data) and 16 MB of L3 cache. It features 1066 MHz FSB, fits into the Tigerton's mPGA604 socket, and is compatible with the both the Intel Caneland, and IBM X4 chipsets. These processors support DDR2-1066 (533 MHz), and have a maximum TDP below 130 W. They are intended for blades and other stacked computer systems. Availability was scheduled for the second half of 2008. It was followed shortly by the Nehalem microarchitecture.

Announced on 15 Sep 2008. Intel link

model Speed (GHz) L3 Cache (MB) FSB (MHz) TDP (W) Cores E7420 2.13 8 1066 90 4 E7430 2.13 12 1066 90 4 E7440 2.40 16 1066 90 4 L7445 2.13 12 1066 50 4 E7450 2.40 12 1066 90 6 L7455 2.13 12 1066 65 6 X7460 2.66 16 1066 130 6